🛸 Hitchhiker's Guide — Phase 12: Leadership & the Capstone
Read this if: you have the depth (Phases 01–11) and need to turn it into the role — decisions, standards, hiring, communication, and an integrated platform. Field notes; the WARMUP carries the synthesis.
0. The 30-second mental model
A Head of Engineering's leverage is decisions, standards, hiring, and clarity — not keystrokes. Five jobs: set direction (strategy + ADRs), build the team, own the quality bar, drive partnerships/commercialization, communicate. Stay hands-on at the highest-leverage risk and the standards, not on critical-path features. The capstone proves you can integrate; the leadership artifacts prove you can lead.
1. The five jobs (and the JD lines they map to)
| Job | JD line | Artifact |
|---|---|---|
| Set technical direction | "decouple software from hardware" | PLATFORM-STRATEGY.md |
| Build the team | (implicit: lead 5+ engineers) | ORG-DESIGN.md |
| Own the quality bar | "ship through a full release cycle" | ENGINEERING-STANDARDS.md |
| Partnerships/commercial | "OEM integrations," "commercialisation" | OEM-ONBOARDING.md |
| Communicate | "technical and executive levels" | (every doc + the demo) |
2. Strategy card
Executable roadmap, not a wish. Thesis (HAL = spine, lock-in = enemy, sovereign + cost-conscious = market) → sequenced bets each with a commercial outcome → build-vs-buy boundary (build HAL, adopt compiler, buy infra) → paced by error budget. Signal of a leader: sequencing, dependencies, kill-criteria. Signal of inexperience: "and then we build everything."
3. Org card
Structure by subsystem ownership (platform-core = HAL+runtime, serving = KV/batching, infra/SRE = scheduling/observability/releases, security = specialist consult). Hire for the gaps (kernel/compiler, GPU-SRE — the rare ones). Org design is strategy: the team shape encodes build-vs-buy. Few principals set standards, senior ICs execute, few juniors in a steep-ramp domain.
4. Standards card
Codify the implicit bar from the phases; defend each with the incident it prevents:
- kernel PR checklist (P02) · runtime contract (P05) · ABI/conformance (P09) · release gates (P10) · security-claim discipline (P11). Standards justified by incidents stick; by authority, rot.
5. OEM card
Onboard a chip = a HAL backend (P09) that passes conformance (correctness → perf tier) → "certified backend" status = quality promise + negotiation lever. Versioned ABI = their backend survives your releases = ecosystem trust. Every OEM = a backend = revenue. The HAL's quality is your partner-pipeline throughput.
6. Commercialization card
| Technical artifact | Commercial thesis |
|---|---|
| HAL (P09) | market access for non-NVIDIA chips + lock-in freedom |
| sovereign security (P11) | the regulated market cloud can't serve |
| sharing tiers (P06) | pricing tiers by isolation guarantee |
| serving efficiency (P07) | goodput/GPU = gross margin |
| conformance (P09) | partner-ecosystem flywheel |
Every investment gets a "who pays more / churns less / becomes reachable."
7. Communication card
- Execs: decisions + consequences + dollars (roofline as $/year, sovereign as TAM). Not mechanism.
- Customers (technical): honest capability + honest limits (goodput-at-SLO, defeat conditions). Credibility compounds; overselling destroys it.
- The through-line: P01 spec-sheet skepticism → P11 "never uncrackable." Honest, decision-oriented communication is a technical leadership skill.
8. Capstone card (how it composes)
request -> license gate (P11) -> admission (P06/07) -> HAL routing (P09)
-> paged-KV continuous batching (P07) -> metrics+SLO (P10)
failures: bad backend -> failover; expiry -> refuse; overload -> shed
Abstraction boundaries (HAL ABI, runtime contract, control-plane API) are the architecture. Cross-cutting concerns (licensing/observability/failure) compose awkwardly — the capstone shows where they belong. CPU-runnable so the architecture is the lesson.
9. Hands-on balance
Stay deep on leveraged work: de-risk a bet with a prototype, do the hard design review, pair on the worst incident, write a standard's reference. Not on critical-path features (you become the bottleneck) and not never (you lose credibility). The JD wants neither extreme. Your code sets patterns and unblocks; it isn't the dependency.
10. Exit bar
You can present an integrated platform end to end to an engineer and an executive; write an executable strategy, an org design, an OEM process, and codified standards; connect every technical bet to revenue; communicate honestly up and out; and articulate the hands-on-without-bottleneck balance. With the prior 11 phases as banked credibility, that's the role. You're ready for the interview — see interview-prep/ and system-design/.