Cheat Sheet — Frontier Pre-Training
Everything worth having memorized, on one page. If you can reproduce this from memory you can hold your own in a pre-training design review.
The core equations
| Quantity | Formula | Notes |
|---|---|---|
| Matmul cost | 2·m·k·n FLOPs | the 2 is multiply + add |
| Linear layer, per token | 2 × params FLOPs | forward only |
| Training compute | C = 6ND | 2N forward + 4N backward |
| Inference compute | 2N per token | prefill and serving |
| Exact per-step (MHA, gated) | 18BTDF + 24BTDNH = 6·BT·(3DF + 4DNH) | MLP term + attention-projection term |
| Attention (seq-dependent) | 12·B·n_h·T²·d_h·L | the part 6ND omits |
| Unembedding | 6·d_model·V per token | large fraction at small N |
| Chinchilla split | N = √(C / 6r), D = rN | r ≈ 20 tokens/param |
| Lifetime cost | 6N·D_train + 2N·D_inf | the objective Chinchilla ignores |
| Scaling law | L = E + A/N^α + B/D^β | irreducible + capacity + data |
Compute-optimal N | N_opt ∝ C^(β/(α+β)) | = 0.5 exactly when α = β |
| Consistency check | a + b ≈ 1 | falls out of C = 6ND — free bug detector |
Memory
| Term | Bytes per parameter | Notes |
|---|---|---|
| bf16 weights | 2 | |
| bf16 gradients | 2 | |
fp32 master + Adam m + v | 12 | |
| Mixed-precision Adam total | 16 | before a single activation |
| Adafactor | 4 (optimizer) | factored second moment |
KV cache = 2 · L · n_kv · d_head · T · B · bytes
ZeRO-1 shards optimizer states (75% of the total — cheapest big win)
ZeRO-2 adds gradients
ZeRO-3 adds parameters (an all-gather per layer)
70B model, mixed-precision Adam: 1.12 TB unsharded. An H100 has 80 GB. You must shard.
Hardware constants
| Chip | bf16 peak | HBM | Bandwidth | Watts |
|---|---|---|---|---|
| H100 SXM | 990 TFLOP/s | 80 GB | 3.35 TB/s | 700 |
| A100-80 | 312 TFLOP/s | 80 GB | 2.03 TB/s | 400 |
| TPU v5e | 197 TFLOP/s | 16 GB | 819 GB/s | 170 |
| TPU v5p | 459 TFLOP/s | 95 GB | 2.77 TB/s | 600 |
Ridge point = peak FLOP/s ÷ bandwidth. H100 ≈ 296 FLOP/byte. Below it → memory-bound.
Energy ratios (Horowitz, ISSCC 2014): a DRAM read costs ~20,000× an 8-bit integer add. This is why quantization is an energy lever first.
Numbers to know
| Typical large-scale MFU | 35–55% (not a failure — an accounting identity) |
| MFU vs HFU | HFU counts recomputation as useful work; always ≥ MFU. Ask which. |
| 0.01 nats of loss | ≈ 33% more compute at frontier scale |
| Irreducible fraction of loss | ~87% at 70B/1.4T — the industry fights over the rest |
| Ladder cost | <2% of flagship buys ~5 decades of log C spread |
| Design placement | spread beats density: ~26× lower extrapolation variance, same cost |
| Goodput swing | 64% vs 94% on identical hardware = 12 days of a 40-day run |
$ per 1e21 FLOPs | ~$1,750 at $2.50/H100-hour, 40% MFU |
C = 6ND — where it breaks
| Break | Error | Fix |
|---|---|---|
| Attention at long context | ~4% at 2k, ~15% at 8k, ~245% at 128k, ~20× at 1M | add 12·L·T·d_model per token |
| MoE | 10–20× | use active parameters, not total |
| Embeddings | up to 89% at small N | report non-embedding N |
| Activation checkpointing | 6ND → ~8ND hardware FLOPs | that gap is MFU vs HFU |
MoE
capacity = capacity_factor × tokens × k / E
L_balance = E · Σ f_i · P_i f = token-slot fraction (discrete)
P = mean router probability (differentiable)
L_z = mean( logsumexp(logits)² )
L_total = L_task + α·L_balance + γ·L_z α ≈ 0.01, γ ≈ 1e-3
| Rule | |
|---|---|
Parameters scale with E; FLOPs scale with k | that is MoE, entire |
L_balance = 1.0 means perfectly balanced | larger is worse — the dashboard number |
top_k == n_experts | sparsity 1.0 — a dense model in an MoE costume |
| Active → FLOPs; total → memory | off by 10–20× if swapped |
| Dropped tokens are silent | they ride the residual; no error is raised |
max_over_mean > 3 | the router is collapsing — intervene now |
| Expert-parallel comms | 2 all-to-alls per layer; ~32 GB / ~2.6 s for an 8k prefill on 60 layers |
Prefill vs decode — never confuse them
| Prefill | Decode | |
|---|---|---|
| Processes | the whole prompt at once | one token at a time |
| Bound by | compute | memory bandwidth |
| Arithmetic intensity | high | 1–43 FLOP/byte (far below the ridge) |
| Optimization | pipelining, chunking | batching, GQA, quantization, speculation |
| Parallelism | pipelined prefill works | pipelining just adds serial hops |
This asymmetry is why prefill/decode disaggregation exists, and why the Flash 2.0 fix was pipelined prefill specifically.
The scaling-law workflow
1. FIX the recipe (how depth/LR/batch scale with N, D) — the law describes THIS
2. Design the ladder: geometric budgets, maximize log-C spread, replicate one point
3. IsoFLOPs: fix C, sweep N, fit a parabola in log N, take the vertex
4. Fit power laws N_opt ∝ C^a, D_opt ∝ C^b → CHECK a + b ≈ 1
5. Or fit L = E + A/N^α + B/D^β — Huber loss, log-space residuals
6. Bootstrap a confidence interval (nonlinear model, unknown noise model)
7. Compare baseline vs candidate laws AT THE TARGET C; report the CROSSOVER
8. State the extrapolation distance out loud: "3 decades beyond our largest ablation"
Decision gate: a delta smaller than your confidence interval is not a result.
Kaplan vs Chinchilla, in one box
| Kaplan (2020) | Chinchilla (2022) | |
|---|---|---|
N_opt ∝ | C^0.73 | C^0.5 |
| 10× compute → | 5.37× params, 1.86× data | ~3.2× each |
| Method | one run per size, intermediate losses | separate runs, properly decayed LR |
| Result | models were UNDERTRAINED | smaller models, trained longer |
The bug: reading loss mid-run is a biased estimator, because much of the improvement comes
from the LR decay at the end. A uniform bias would be absorbed into E and change nothing;
it is the non-uniformity across the ladder that tilts the exponents.
Tokens per parameter, historically: GPT-3 1.7 → Chinchilla 20 → Llama-3-70B 214 → Llama-3-8B 1875. A 1000× swing driven first by a methodology fix, then by serving economics.
Feinberg's three verticals
| Vertical | The problem | The hard part |
|---|---|---|
| Distillation | push teacher statistics into a student | storage: 10T tokens × 256k vocab = 5 EB. Top-k or online. |
| Inference co-design | shapes that saturate every hardware unit | quality vs MFU pull opposite ways; differs per chip generation |
| Quantization | FP32 → 4 bits | outliers; power is ~99% of TCO |
Distillation in one sentence: variance reduction — a better teacher reduces bias.
Interview one-liners
- "Backward is exactly 2× forward" — each forward matmul becomes two backward matmuls,
dX = dY·WᵀanddW = Xᵀ·dY, each the same size. - "35% MFU is an accounting identity" — the matmul unit idles during vector ops, memory traffic, collectives and the optimizer step. Read the breakdown; it is your agenda.
- "Active for FLOPs, total for memory."
- "I wouldn't train both and compare" — fit a law for each, evaluate at the target
C, report the delta with intervals plus the crossover, because curves cross. - "That difference is inside our error bars."
- "Prefill is compute-bound, decode is memory-bound" — never apply one's optimization to the other.
- "Power is the bill" — a DRAM read costs ~20,000× an integer add.
- "A scaling law describes your recipe, not the universe."
The five things that will actually kill your run
- Loss spike — decide in minutes: skip the batch, lower LR, or roll back.
- Silent data corruption — no crash, model quietly degrades. Cross-replica checksums.
- Data-iterator bug — wrong shard or an off-by-one. Days of compute on the wrong data.
- Router collapse (MoE) — watch
max_over_mean; above 3 is an emergency. - Slow checkpoints — cadence and restart speed are worth ~12 days of a 40-day run.